View LT1460-5_75614.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LT1460-5 Micropower Precision Series Reference
FEATURES
s s s s s s s s s s
DESCRIPTIO
High Accuracy: 0.075% Max Low Drift: 10ppm/C Max Industrial Temperature Range SO-8 Package Temperature Coefficient Guaranteed to 125C Low Supply Current: 175A Max Minimum Output Current: 20mA No Output Capacitor Required Reverse Battery Protection Minimum Input/Output Differential: 0.9V Available in Small MSOP Package
APPLICATIO S
s s s s s
Handheld Instruments Precision Regulators A/D and D/A Converters Power Supplies Hard Disk Drives
The LT (R)1460-5 is a micropower bandgap reference that combines very high accuracy and low drift with low power dissipation and small package size. This series reference uses curvature compensation to obtain a low temperature coefficient and trimmed precision thin-film resistors to achieve high output accuracy. The reference will supply up to 20mA, making it ideal for precision regulator applications, yet it is almost totally immune to input voltage variations. This series reference provides supply current and power dissipation advantages over shunt references that must idle the entire load current to operate. Additionally, the LT1460-5 is stable with capacitive loads and does not require an output capacitor. This feature is important in critical applications where PC board space is a premium or fast settling is demanded. Reverse battery protection keeps the reference from conducting current and being damaged. The LT1460-5 is available in the 8-lead MSOP, SO, PDIP and the 3-lead TO-92 packages. It is also available in the SOT-23 package; see separate data sheet LT1460S3-5 (SOT-23).
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Basic Connection
LT1460-5 IN C1 0.1F GND
1460-5 TA01
Typical Distribution of Output Voltage S8 Package
20 18 1400 PARTS FROM 2 RUNS
5.9V TO 20V
OUT
5V
16 14
UNITS (%)
12 10 8 6 4 2 0 -0.10 -0.06 -0.02 0 0.02 0.06 OUTPUT VOLTAGE ERROR (%) 0.10
U
1460-5 TA02
U
U
1
LT1460-5
ABSOLUTE MAXIMUM RATINGS
Input Voltage ........................................................... 30V Reverse Voltage .................................................... - 15V Output Short-Circuit Duration, TA = 25C VIN > 10V ........................................................... 5 sec VIN 10V ................................................... Indefinite
PACKAGE/ORDER INFORMATION
TOP VIEW DNC* VIN DNC* GND 1 2 3 4 8 7 6 5 DNC* DNC* VOUT DNC*
DNC* 1 VIN 2 DNC* 3 GND 4 N8 PACKAGE 8-LEAD PDIP TOP VIEW 8 7 6 5 DNC* DNC* VOUT DNC* *CONNECTED INTERNALLY. DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS
MS8 PACKAGE 8-LEAD PLASTIC MSOP *CONNECTED INTERNALLY. DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS TJMAX = 150C, JA = 250C/ W
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 150C, JA = 130C/ W (N8) TJMAX = 150C, JA = 190C/ W (S8)
ORDER PART NUMBER LT1460CCMS8-5 LT1460FCMS8-5
ORDER PART NUMBER LT1460ACN8-5 LT1460BIN8-5 LT1460DCN8-5 LT1460EIN8-5 LT1460ACS8-5 LT1460BIS8-5 LT1460DCS8-5 LT1460EIS8-5 S8 PART MARKING 1460A5 460BI5 1460D5 460EI5 460LH5 460MH5 LT1460LHS8-5 LT1460MHS8-5
MS8 PART MARKING LTAF LTAG
Consult factory for Military grade parts.
Available Options
ACCURACY (%) 0.075 0.10 0.10 0.10 0.125 0.15 0.25 0.25 0.20 0.20 TEMPERATURE COEFFICIENT (ppm/C) 10 10 15 20 20 25 25 25 20/50 50 LT1460LHS8-5 LT1460MHS8-5 LT1460DCN8-5 LT1460EIN8-5 LT1460DCS8-5 LT1460EIS8-5 LT1460FCMS8-5 LT1460GCZ-5 LT1460GIZ-5 PACKAGE TYPE N8 LT1460ACN8-5 LT1460BIN8-5 S8 LT1460ACS8-5 LT1460BIS8-5 LT1460CCMS8-5 MS8 Z
TEMPERATURE 0C to 70C - 40C to 85C 0C to 70C 0C to 70C - 40C to 85C 0C to 70C 0C to 70C - 40C to 85C - 40C to 85C/125C - 40C to 125C
2
U
U
W
WW
U
W
(Note 1)
Specified Temperature Range Commercial (C) ...................................... 0C to 70C Industrial (I) ...................................... - 40C to 85C High (H)............................................ - 40C to 125C Storage Temperature Range (Note 2) ... - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
BOTTOM VIEW 3 VIN 2 VOUT 1 GND
Z PACKAGE 3-LEAD TO-92 PLASTIC TJMAX = 150C, JA = 160C/ W
ORDER PART NUMBER LT1460GCZ-5 LT1460GIZ-5
LT1460-5
ELECTRICAL CHARACTERISTICS
PARAMETER Output Voltage (Note 3)
VIN = 7.5V, IOUT = 0, TA = 25C unless otherwise specified.
MIN 4.99625 - 0.075 4.995 - 0.10 4.99375 - 0.125 4.9925 - 0.15 4.9875 - 0.25 4.990 - 0.20
q q q q q q q q
CONDITIONS LT1460ACN8, ACS8 LT1460BIN8, BIS8, CCMS8, DCN8, DCS8 LT1460EIN8, EIS8 LT1460FCMS8 LT1460GCZ, GIZ LT1460LHS8, MHS8
TYP 5.000 5.000 5.000 5.000 5.000 5.000
MAX 5.00375 0.075 5.005 0.10 5.00625 0.125 5.0075 0.15 5.0125 0.25 5.010 0.20 10 15 20 25 20 50 50 60 80 25 35 2800 3500 135 180 100 140 2.5 0.9 1.3 1.4
UNITS V % V % V % V % V % V % ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/V ppm/V ppm/V ppm/V ppm/mA ppm/mA ppm/mA ppm/mA ppm/mA ppm/mA ppm/mW V V V mA A A A VP-P VRMS ppm/kHr ppm ppm
Output Voltage Temperature Coefficient (Note 4)
TMIN TJ TMAX LT1460ACN8, ACS8, BIN8, BIS8 LT1460CCMS8 LT1460DCN8, DCS8, EIN8, EIS8 LT1460FCMS8, GCZ, GIZ LT1460LHS8 - 40C to 85C - 40C to 125C LT1460MHS8 - 40C to 125C 5.9V VIN 7.5V 7.5V VIN 20V
5 7 10 12 10 25 25 30 10
Line Regulation
q
Load Regulation Sourcing (Note 5)
IOUT = 100A
q
1500 80
q
IOUT = 10mA IOUT = 20mA 0C to 70C Thermal Regulation (Note 6) Dropout Voltage (Note 7) P = 200mW VIN - VOUT, VOUT 0.1%, IOUT = 0 VIN - VOUT, VOUT 0.1%, IOUT = 10mA
q q
70
q
0.5
Output Current Reverse Leakage Supply Current
Short VOUT to GND VIN = - 15V
q q
40 0.5 125 10 175 225
Output Voltage Noise (Note 8) Long-Term Stability of Output Voltage, S8 Pkg (Note 9) Hysteresis (Note 10)
0.1Hz f 10Hz 10Hz f 1kHz T = - 40C to 85C T = 0C to 70C
20 20 40 160 25
3
LT1460-5
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the specified temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: If the part is stored outside of the specified temperature range, the output may shift due to hysteresis. Note 3: ESD (Electrostatic Discharge) sensitive device. Extensive use of ESD protection devices are used internal to the LT1460, however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 4: Temperature coefficient is measured by dividing the change in output voltage by the specified temperature range. Incremental slope is also measured at 25C. Note 5: Load regulation is measured on a pulse basis from no load to the specified load current. Output changes due to die temperature change must be taken into account separately. Note 6: Thermal regulation is caused by die temperature gradients created by load current or input voltage changes. This effect must be added to normal line or load regulation. This parameter is not 100% tested. Note 7: Excludes load regulation errors. Note 8: Peak-to-peak noise is measured with a single highpass filter at 0.1Hz and a 2-pole lowpass filter at 10Hz. The unit is enclosed in a still-air environment to eliminate thermocouple effects on the leads. The test time is 10 sec. RMS noise is measured with a single highpass filter at 10Hz and a 2-pole lowpass filter at 1kHz. The resulting output is full wave rectified and then integrated for a fixed period, making the final reading an average as opposed to RMS. A correction factor of 1.1 is used to convert from average to RMS and a second correction of 0.88 is used to correct for the nonideal bandpass of the filters. Note 9: Long-term stability typically has a logarithmic characteristic and therefore, changes after 1000 hours tend to be much smaller than before that time. Total drift in the second thousand hours is normally less than one third that of the first thousand hours with a continuing trend toward reduced drift with time. Significant improvement in long-term drift can be realized by preconditioning the IC with a 100 hour to 200 hour, 125C burn-in. Long-term stability will also be affected by differential stresses between the IC and the board material created during board assembly. See PC Board Layout in the Applications Information section. Note 10: Hysteresis in output voltage is created by package stress that differs depending on whether the IC was previously at a higher or lower temperature. Output voltage is always measured at 25C, but the IC is cycled to 85C or - 40C before successive measurements. Hysteresis is roughly proportional to the square of the temperature change. Hysteresis is not normally a problem for operational temperature excursions where the instrument might be stored at high or low temperature.
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input-Output Voltage Differential
100
OUTPUT VOLTAGE CHANGE (mV)
OUTPUT CURRENT (mA)
10
125C
1
0.1 0 0.5 1.0 1.5 2.0 INPUT-OUTPUT VOLTAGE (V) 2.5
1460-5 G01
4
UW
25C -55C
Load Regulation, Sourcing
6 5 4 125C 3 2 -55C 1 0 25C
0.1
1 10 OUTPUT CURRENT (mA)
100
1460-5 G02
LT1460-5 TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation, Sinking
100 90
5.004 3 TYPICAL PARTS 5.002 SUPPLY CURRENT (A) OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE CHANGE (mV)
80 70 60 50 40 30 20 10 0 0 1 3 4 2 OUTPUT CURRENT (mA) 5
1460-5 G03
-55C
Line Regulation
5.002 25C 5.000
OUTPUT VOLTAGE (V)
POWER SUPPLY REJECTION RATIO (dB)
OUTPUT IMPEDANCE ()
4.998
125C
4.996 -55C 4.994
4.992 0 2 4 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V)
1460-5 G06
Transient Responses
3000 10 LOAD CAPACITANCE (F) 2000
1
1000
0.1
0 0.2ms/DIV IOUT = 10mA
1460-5 G09
100 10
OUTPUT NOISE (10V/DIV)
NOISE VOLTAGE (nV/Hz)
UW
25C 125C
Output Voltage Temperature Drift
200 180 160 140 120 100 80 60 40 20 4.994 -50 0 -25 0 25 50 TEMPERATURE (C) 75 100
Supply Current vs Input Voltage
125C
25C -55C
5.000
4.998
4.996
0
2
4
6
8
10 12 14 16 18 20
1460-5 G05
INPUT VOLTAGE (V)
1460-5 G04
Power Supply Rejection Ratio vs Frequency
90 80 70 60 50 40 30 20 10 0 100 1k 10k 100k FREQUENCY (Hz) 1M
1460-5 G07
Output Impedance vs Frequency
1k CL = 0 100 CL= 0.1F
10
1 CL= 1F 0.1 10 100 1k 10k FREQUENCY (Hz) 100k 1M
1460-5 G08
Output Voltage Noise Spectrum
Output Noise 0.1Hz to 10Hz
100
1k 10k FREQUENCY (Hz)
100k
1460-5 G10
0
1
2
3
456 TIME (SEC)
7
8
9
10
1460-5 G11
5
LT1460-5
APPLICATIONS INFORMATION
Longer Battery Life Series references have a large advantage over older shunt style references. Shunt references require a resistor from the power supply to operate. This resistor must be chosen to supply the maximum current that can ever be demanded by the circuit being regulated. When the circuit being controlled is not operating at this maximum current, the shunt reference must always sink this current, resulting in high dissipation and short battery life. The LT1460-5 series reference does not require a current setting resistor and can operate with any supply voltage from VOUT + 0.9V to 20V. When the circuitry being regulated does not demand current, the LT1460-5 reduces its dissipation and battery life is extended. If the reference is not delivering load current it dissipates less than 1mW on a 7.5V supply, yet the same configuration can deliver 20mA of load current when demanded. Capacitive Loads The LT1460-5 is designed to be stable with capacitive loads. With no capacitive load, the reference is ideal for fast settling or applications where PC board space is a premium. The test circuit shown in Figure 1 is used to measure the response time for various load currents and load capacitors. The 1V step from 5V to 4V produces a current step of 1mA or 100A for RL = 1k or RL = 10k. Figure 2 shows the response of the reference with no load capacitance. The reference settles to 5mV (0.1%) in less than 2s for a 100A pulse and to 0.1% in 3s with a 1mA step. When load capacitance is greater than 0.01F, the reference begins to ring due to the pole formed with the output impedance. Figure 3 shows the response of the reference to a 1mA and 100A load with a 0.01F load capacitor. Fast Turn-On It is recommended to add a 0.1F or larger input capacitor to the input pin of the LT1460-5. This helps stability with large load currents and speeds up turn-on. The LT1460-5 can start in 10s, but it is important to limit the dv/dt of the input. Under light load conditions and with a very fast input, internal nodes overslew and this requires finite recovery time. Figure 4 shows the result of no bypass
VIN 0V 5V VGEN 4V
VIN = 5V CIN 0.1F LT1460-5 VOUT CL RL VGEN 5V 4V
1460-5 F01
6
U
W
U
U
Figure 1. Response Time Test Circuit
5V VGEN 4V
VOUT
RL = 10k
VOUT
RL = 1k
2s/DIV
1460-5 F02
Figure 2. CL = 0
VOUT
RL = 10k
VOUT
RL = 1k
10s/DIV
1460-5 F03
Figure 3. CL = 0.01F
7.5V
VOUT 0V 20s/DIV
1460-5 F04
Figure 4. CIN = 0
LT1460-5
APPLICATIONS INFORMATION
capacitance on the input and no output load. In this case the supply dv/dt is 7.5V in 30ns which causes internal overslew, and the output does not bias to 5V until 45s. Although 45s is a typical turn-on time, it can be much longer. A 0.1F input capacitor guarantees the part always starts quickly as shown in Figure 5. For temperature 0C to 70C the maximum T = 70C,
VIN
VOUT 0V 20s/DIV
1460-5 F04
Figure 5. CIN = 0.1F
Output Accuracy Like all references, either series or shunt, the error budget of the LT1460-5 is made up of primarily three components: initial accuracy, temperature coefficient and load regulation. Line regulation is neglected because it typically contributes only 30ppm/V, or 150V for a 1V input change. The LT1460-5 typically shifts less than 0.01% when soldered into a PCB, so this is also neglected (see PC Board Layout section). The output errors are calculated as follows for a 100A load and 0C to 70C temperature range: LT1460AC Initial accuracy = 0.075% For IO = 100A,
3500ppm VOUT = 0.1mA 5V = 1.75mV mA
(
)( )
which is 0.035%.
IOUT 0 100A 10mA 20mA LT1460AC 0.145% 0.180% 0.325% 0.425% LT1460BI 0.225% 0.260% 0.405% N/A LT1460CC 0.205% 0.240% 0.385% 0.485% 0.240% 0.275% 0.420% 0.520%
U
0V
W
U
U
10ppm VOUT = 70C 5V = 3.5mV C
( )( )
which is 0.07%. Total worst-case output error is: 0.075% + 0.035% + 0.070% = 0.180%.
7.5V
Table 1 gives worst-case accuracy for the LT1460AC, CC, DC, FC, GC from 0C to 70C and the LT1460BI, EI, GI from - 40C to 85C. PC Board Layout In 13- to 16-bit systems where initial accuracy and temperature coefficient calibrations have been done, the mechanical and thermal stress on a PC board (in a cardcage for instance) can shift the output voltage and mask the true temperature coefficient of a reference. In addition, the mechanical stress of being soldered into a PC board can cause the output voltage to shift from its ideal value. Surface mount voltage references (MS8 and S8) are the most susceptible to PC board stress because of the small amount of plastic used to hold the lead frame. A simple way to improve the stress-related shifts is to mount the reference near the short edge of the PC board, or in a corner. The board edge acts as a stress boundary, or a region where the flexure of the board is minimum. The package should always be mounted so that the leads absorb the stress and not the package. The package is generally aligned with the leads parallel to the long side of the PC board as shown in Figure 7a. A qualitative technique to evaluate the effect of stress on voltage references is to solder the part into a PC board and deform the board a fixed amount as shown in Figure 6. The flexure #1 represents no displacement, flexure #2 is concave movement, flexure #3 is relaxation to no displacement and finally, flexure #4 is a convex movement.
LT1460DC LT1460EI 0.375% 0.410% 0.555% N/A LT1460FC 0.325% 0.360% 0.505% 0.605% LT1460GC 0.425% 0.460% 0.605% 0.705% LT1460GI 0.562% 0.597% 0.742% N/A
7
LT1460-5
APPLICATIONS INFORMATION
This motion is repeated for a number of cycles and the relative output deviation is noted. The result shown in Figure 7a is for two LT1460S8-5s mounted vertically and Figure 7b is for two LT1460S8-5s mounted horizontally. The parts oriented in Figure 7a impart less stress into the package because stress is absorbed in the leads. Figures 7a and 7b show the deviation to be between 250V and 500V and implies a 50ppm and 100ppm change respectively. This corresponds to a 13- to 14-bit system and is
1 2 3 4
1460-5 F06
Figure 6. Flexure Numbers
4 OUTPUT DEVIATION (mV)
4
OUTPUT DEVIATION (mV)
2
0
LONG DIMENSION
-2 0 10 20 FLEXURE NUMBER 30 40
1460-5 F07a
Figure 7a. Two Typical LT1460S8-5s, Vertical Orientation Without Slots
4 OUTPUT DEVIATION (mV) OUTPUT DEVIATION (mV)
2
0 SLOT -2 0 10 20 FLEXURE NUMBER 30 40
1460-5 F08a
Figure 8a. Same Two LT1460S8-5s in Figure 7a, but With Slots
8
U
W
U
U
not a problem for most 10- to 12-bit systems unless the system has a calibration. In this case, as with temperature hysteresis, this low level can be important and even more careful techniques are required. The most effective technique to improve PC board stress is to cut slots in the board around the reference to serve as a strain relief. These slots can be cut on three sides of the reference and the leads can exit on the fourth side. This "tongue" of PC board material can be oriented in the long direction of the board to further reduce stress transferred to the reference. The results of slotting the PC boards of Figures 7a and 7b are shown in Figures 8a and 8b. In this example the slots can improve the output shift from about 100ppm to nearly zero.
2
0
LONG DIMENSION
-2 0 10 20 FLEXURE NUMBER 30 40
1460-5 F07b
Figure 7b. Two Typical LT1460S8-5s, Horizontal Orientation Without Slots
4
2
0 SLOT -2 0 10 20 FLEXURE NUMBER 30 40
1460-5 F08b
Figure 8b. Same Two LT1460S8-5s in Figure 7b, but With Slots
LT1460-5
SI PLIFIED SCHE ATIC
150k
48k
W
W
VCC
VOUT
GND
1460-5 SS
9
LT1460-5
PACKAGE DESCRIPTION
0.007 (0.18) 0.021 0.006 (0.53 0.015)
0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) TYP 0.192 0.004 (4.88 0.10) 0.118 0.004** (3.00 0.102)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.300 - 0.325 (7.620 - 8.255)
0.009 - 0.015 (0.229 - 0.381)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 0.003 (0.457 0.076)
(
+0.035 0.325 -0.015 +0.889 8.255 -0.381
)
0.100 0.010 (2.540 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
10
U
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102) 0.040 0.006 (1.02 0.15) 0.034 0.004 (0.86 0.102) 8 76 5
0.006 0.004 (0.15 0.102)
MSOP (MS8) 1197
1
23
4
N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400* (10.160) MAX 8 7 6 5
0.045 - 0.065 (1.143 - 1.651)
0.130 0.005 (3.302 0.127)
0.255 0.015* (6.477 0.381)
1
2
3
4
N8 1197
LT1460-5
PACKAGE DESCRIPTION
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.060 0.005 (1.524 0.127) DIA
0.180 0.005 (4.572 0.127)
0.500 (12.70) MIN
0.050 0.005 (1.270 0.127)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 0.053 - 0.069 (1.346 - 1.752) 0.004 - 0.010 (0.101 - 0.254) 8 7 6 5
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
SO8 0996
1
2
3
4
Z Package 3-Lead Plastic TO-92 (Similar to TO-226)
(LTC DWG # 05-08-1410)
0.180 0.005 (4.572 0.127)
0.060 0.010 (1.524 0.254)
0.90 (2.286) NOM
0.140 0.010 (3.556 0.127)
0.050 UNCONTROLLED (1.270) LEAD DIMENSION MAX
5 NOM
10 NOM
0.015 0.002 (0.381 0.051) 0.016 0.003 (0.406 0.076)
Z3 (TO-92) 0695
11
LT1460-5
TYPICAL APPLICATIONS
Boosted Output Current with No Current Limit
V + (VOUT + 1.8V) R1 220 2N2905 IN LT1460-5 OUT GND 5V 100mA
IN LT1460-5 OUT GND 5V 100mA 2F SOLID TANT
+
RELATED PARTS
PART NUMBER LT1236 LT1019 LT1027 DESCRIPTION Precision Low Noise Reference Precision Bandgap Reference Precision 5V Reference COMMENTS 0.05% Max, 5ppm/C Max, SO Package 0.05% Max, 5ppm/C Max 0.02%, 2ppm/C Max
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
U
Boosted Output Current with Current Limit
V+ VOUT + 2.8V D1* LED R1 220
+
47F
+
8.2 2N2905 47F
2F SOLID TANT
+
1460-5 TA03
* GLOWS IN CURRENT LIMIT, DO NOT OMIT
1460-5 TA04
Handling Higher Load Currents
7.5V 40mA
+
47F IN 10mA LT1460-5 GND RL TYPICAL LOAD CURRENT = 50mA OUT R1* 63 VOUT 5V
*SELECT R1 TO DELIVER 80% OF TYPICAL LOAD CURRENT. LT1460 WILL THEN SOURCE AS NECESSARY TO MAINTAIN PROPER OUTPUT. DO NOT REMOVE LOAD AS OUTPUT WILL BE DRIVEN UNREGULATED HIGH. LINE REGULATION IS DEGRADED IN THIS APPLICATION
1460-5 TA05
14605fa LT/TP 1298 2K REV A * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1997

▲Up To Search▲

Price & Availability of LT1460-5

	To Download LT1460-5 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .